News
April 22, 2021 - Summit Interconnect Anaheim Opens New State-of-the-Art Laboratory
November 7, 2019 - CAT Announces Shipments of Second Generation OM Thermal Stress Systems
October 3, 2019 - Conductor Analysis Technologies Ships Second Generation OM Thermal Stress System
March 6, 2019 - IPC Issues Electronics Industry Warning on Printed Board Microvia Reliability
October 13, 2017 - Conductor Analysis Technologies Releases New IPC PCQR² Test Patterns
Technical Papers, Presentations & Articles
Performance Based Microvia Reliability Testing - What You Need to Know
A discussion of performance based reliability testing based on IPC TM-650 2.6.27B by Lance A. Auer, Timothy A. Estes and Nicholas J. Meeker at IPC Microvia Summit 2020.
Microvia Reliability in Ultra-High Density Interconnect Designs
An intervirew with Jim Brown of GreenSource Fabrication by Judy Warner of Altium at IPC APEX February 2020.
PCQR2 Tool: A Scorecard for Suppliers?
An intervirew with Al Block and Naji Norder of National Instruments by Patty Goldman of I-CONNECT007 at IPC APEX February 2020.
Innovative Testing of High Reliability PCB Manufacturers
This article provides an overview of the IPC Process Capability, Quality and Reliability (PCQR²) Database. Published by Mark Northrup of IEC Electronics, August 2018.
IPC 2018 High Reliability Forum
This presentation provides an overview of the activities and progress of IPC comittees related to via reliability, and discusses industry issues related to microvia reliability. Published by Lance Auer of Conductor Analysis Technologies, Inc., May 2018.
In this interview, David Wolf discusses some of the trends he’s seeing in via structures, and the common reliability and quality issues related to vias. Published by Andy Shaughnessy of PCBDesign007, November 2016.
This paper and presentation discusses how PCB sourcing at National Instruments has been streamlined by removing subjectivity and ensuring that awarded PCB technology aligns with each supplier’s capability. This change has resulted in an increase in quality, higher customer satisfaction, and dramatic cost savings to both National Instruments and the PCB supply base. Published at IPC APEX in Las Vegas, NV by Al Block, Naji Norder and Chris Joran of National Instruments, March 2016.
What Will it Take to Make Micro-Section Acceptance/Rejection Criteria Obsolete?
This presentation focuses on advancing IPC specifications with new testing techniques that will reduce and/or eliminate traditional via hole micro-sections for printed board acceptance criteria. Published at IPC APEX, February 2015.
Updated Database Standard Makes it Easier to Compare Printed Board Fabricator Capabilities
An in-depth discussion of the quantitative statistical techniques used by Conductor Analysis Technologies that distinguish one supplier or process from another. Published by Terry Costlow, IPC online editor, May 2014.
Understanding Process Capability, Quality and Reliability
An in-depth discussion of the quantitative statistical techniques used by Conductor Analysis Technologies that distinguish one supplier or process from another. Published by Conductor Analysis Technologies, Inc., January 2010.
Via Reliability – A Holistic Process Approach
The results of a case study from the IPC PCQR² Database which documents that both process capability and quality must be satisfied before initiating via reliability studies. Relying on reliability studies alone can give a false indication of overall printed circuit board manufacturing capabilities. Published at the SMTA International Conference in San Diego, CA by David Wolf of Conductor Analysis Technologies, Inc., October 2009.
The Effect of Process Equipment on Fine-Line Uniformity
Information is presented on the sources of process non-uniformities including: laser direct imaging, photo-plotter resolution, and etching. Published at IPC Printed Circuits Expo, March 2003.
From 1996 to 2005 Conductor Analysis Technologies, Inc. published a column in CircuiTree magazine related to printed circuit manufacturing process improvement and measuring printed circuit process capability, quality and reliability. This document is a compilation of the most relevant columns.
Quad-D Coupon Designs
These designs are used to evaluate microvia capability. When incorporated on PCB production panels the data collected from OM thermal stress testing is used to establish realistic microvia design rules. The designs may be copied, distributed, and used in their entirety, free of charge, provided that the "readme.txt" file is not altered and is included along with the Gerber files. Download
𝜇Via Test Panel for Electroless Copper
This design is used to evaluate electroless copper process capability. Analysis of test panels provides net yields with defect mapping and net resistance uniformity. The designs may be copied, distributed, and used in their entirety, free of charge, provided that the "readme.pdf" file is not altered and is included along with the Gerber files. Download
Conductor and Space Designs
These designs are used to evaluate conductor and space process capability and quality. Analysis reports from CAT document conductor and space yields, and conductor width and height control. The designs may be copied, distributed, and used in their entirety, free of charge, provided that the "readme.txt" file is not altered and is included along with the Gerber files. Download
Dot Designs
These designs are used to evaluate exposure capability and uniformity, developer capability and uniformity, and photoresist adhesion through developing and etching processes. The designs may be copied, distributed, and used in their entirety, free of charge, provided that the "readme.txt" file is not altered and is included along with the Gerber files. Download
